Lead Design Engineer - SOC Design

该职位来源于猎聘 Job Description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities:

• Looking for an experienced SOC (System-on-Chip) Design engineer with hands-on experience with experience in any protocol like AMBA, PCIe, USB, MIPI or DDR/LPDDR.
• ARM/RISC-V Processor integration experience preferred.
• Good understanding of clocking, reset, asynchronous domain crossing concepts, bus architecture planning and optimization, Low power design concepts preferred
• Collaborate with verification teams to ensure design intent, testability, and coverage; address complex debug issues.
• Work closely with customer and internal engineering teams to deliver seamless service and support. Requirements:
• Bachelor’s/Master’s in Electrical/Computer Engineering or related field with 3+ years experience in digital SOC design
• Expertise in SOC or IP design, SOC integration, RTL coding, synthesis and basic understanding of timing constraints
• Experience in front end design checks like LINT, CDC, RDC, UPF and constraint checks / validation
• Good Communication in English