Lead DFT Engineer

We are at a pivotal moment in the semiconductor industry. Technology is evolving at an unprecedented pace, and Texas Instruments' MCU organization is right at the center of this transformation.

Our current work is focused on developing solutions for high-growth markets — including AI-driven data centers and emerging domains such as humanoid systems. These areas are actively shaping the future of computing, automation, and intelligent systems, offering a rare opportunity to work on cutting-edge technologies with real-world, large-scale impact.

If you are passionate about solving complex technical challenges and want to contribute to innovations in these fast-growing segments, this is your moment. This role is not only technically rewarding — it is strategically significant.

Texas Instruments is seeking an experienced and driven DFT Lead to lead and shape the test engineering strategy within our MCU organization. In this role, you will direct and guide the activities of a research and technical design function responsible for designing, developing, modifying, and evaluating digital electronic parts, components, and integrated circuitry for electronic equipment and hardware systems.

You will play a critical leadership role in ensuring that our silicon is not only designed for performance and power efficiency, but also for testability, reliability, and manufacturability — qualities that are essential as we scale into AI and next-generation compute platforms.

Key Responsibilities

• Lead DFT strategy and execution across complex SoC and MCU designs targeting AI data center and humanoid system applications
• Direct and guide a team of DFT engineers in the design, development, and evaluation of test structures including scan chains, BIST, JTAG, boundary scan, and ATPG flows
• Prepare and presentoutcomes of DFT projects, test coverage metrics, and manufacturing test results; make actionable recommendations to achieve desired results
• Collaborate cross-functionally with design, verification, physical design, and manufacturing teams to integrate DFT methodologies early in the design cycle
• Drive continuous improvement in test coverage, fault detection, and test time reduction across product families
• Select, develop, and evaluate personnel to ensure efficient operation of the DFT function; mentor engineers and foster a culture of technical excellence

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (Master's or PhD preferred)
• 5+ years of experience in digital design or DFT engineering
• Deep expertise in DFT methodologies: scan insertion, ATPG, BIST (Logic/Memory), JTAG, boundary scan, and test compression
• Hands-on experience with industry-standard EDA tools (e.g., Synopsys TestMAX, Mentor Tessent)
• Strong understanding of SoC/MCU architecture and digital design flows
• Proven ability to lead cross-functional teams and deliver results in a fast-paced, high-complexity environment
• Excellent communication skills — ability to present technical findings and recommendations to both engineering and executive audiences

Preferred Qualifications

• Background in embedded systems or MCU product development
• Experience with silicon bring-up, failure analysis, and yield improvement initiatives