Memory controller system validation engineer

• Memory system validation on SoC 2. Memory validation focuses on LPDDR5 and next-generation LPDDR6 memory subsystem validation, including both pre-silicon and post-silicon phases. 3. Memory validation will work closely with Memory Controller, PHY, SI/PI, and Software teams to ensure robust memory performance, stability, and production readiness for high-volume platforms.

Main Requirements and Qualifications

• 1. Perform LPDDR5/LPDDR6 memory subsystem validation for Controller and PHY
• 2. Execute Pri-silicon and post-silicon validation including functional tests, stress tests, and corner condition validation)
• 3. Support memory training validation, timing margin analysis and debug
• 4. Perform high-speed signal measurement using oscilloscopes and related lab equipment
• 5. Conduct basic SI/PI validation and waveform analysis
• 6. Develop and maintain validation test plans and test reports
• 7. Debug system-level issues such as boot failure, random hang, and data corruption
• 8. Programming skills in C/Python
• 9. Experience in debugger operation
• 10. Good written and oral communication skills
• 11. Strong analytical and problem-solving skills
• 12. Familiarity with LPDDR5/LPDDR6 or JEDEC memory specifications is a plus