Memory Design Engineer

JD – Memory Characterization Engineer

Here is the JD.

Required Skills and Experience: 4+ Years

• Expertise in electrical characterization and/or compliance of memory interfaces (DDR5/4/etc., LPDDR5/4/etc.)
• Expertise in characterization of SoC, processors, PLL, Oscillators, etc.
• Experience with FPGA design flow (using Libero, Quartus, Vivado, etc.) using Verilog or VHDL
• Firmware Development on multi-core microcontrollers or processors (ARM/RISC-V or similar)
• Experience working in a laboratory environment, using lab equipment such as BERTs, logic analyzers, spectrum analyzers, oscilloscopes, function generators, etc.
• In-depth knowledge of electrical engineering fundamentals including CMOS device operation and characteristics
• Exposure to automated characterization flows to maximize use of equipment
• Experience in board design fundamentals, signal and power integrity
• Initiative (self-motivated, self-confident, self-driven, self-learning, always striving for excellence)
• Commitment (responsible, responsive, commit to winning)
• Work quality ("do it right the first time", attention to detail, good documentation)
• Strong communication, documentation and presentation skills