Memory Layout Design Engineer

Job highlights

• Duration: Full Time .
• Good problem solving and logical reasoning skills
• Experience in creating basic memory layouts from scratch
• Required Qualifications: . 3 to 7 years of experience
• Good communication skills required. .
• Preferred Qualifications: . Understanding of memory architecture

Job Description
Position: Memory Layout Design Engineer
Location: Bangalore
Duration: Full Time
Description:

Layout Design of SRAM/CAM/RF compiler memories in 5/3FF technology.

Responsibilities:

• Development of key building blocks of memory architecture such as Row Decoder, IO,
  Control.

• Skilled in pitched layout concepts, floor planning for Placement, Power and Global
  Routing.

• Compiler level integration, verification of Compiler/Custom memories.

Required Qualifications:

• 3 to 7 years of experience.

• Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor
  Graphics Caliber etc.

• Good problem solving and logical reasoning skills.

• Good communication skills required.

Preferred Qualifications:

• Understanding of memory architecture.

• Experience in creating basic memory layouts from scratch.

• Knowledge of memory peripheral blocks, including control blocks, I/O blocks, and row
  drivers.

• Knowledge of compiler issues.

• Understanding of reliability issues.

• Simulation effects.

• EMI (Electromagnetic Interference) considerations.