Memory Layout Engineer

Position: Memory Layout Engineer

Experience: 2 to 7 Years

Location: Bangalore

Job Responsibilities:

* Perform custom memory layout design for SRAM, ROM, Register File and other memory macros.

* Develop and implement physical layout based on circuit/schematic requirements.

* Handle floorplanning, placement, routing, matching and optimization of memory layouts.

* Perform DRC, LVS, ERC and other physical verification checks and resolve violations.

* Work closely with Memory Design, Circuit Design, PDK and Physical Verification teams.

* Optimize layouts for area, timing, power, parasitics and yield.

* Analyze and resolve layout-related issues such as DRC/LVS errors, antenna violations and parasitic concerns.

* Support layout extraction and post-layout verification.

* Follow technology-specific design rules, layout methodologies and reliability requirements.