Memory System Architect / Designer

• Develop and implement tailored DRAM controller/PHY solutions for automotive applications. Validate functionality, improve design revisions and meet performance targets as well as system requirements. 2. Perform rigorous design testing and debugging in automotive environments. Troubleshoot and propose solutions for any issues occurring in post-silicon validation. 3. System Level Cache Design & Implementation: Design and implement system level cache strategies to optimize performance and efficiency across our product range. 4. System-Level Understanding: Exhibit a system-level understanding of performance trade-offs, system architecture, memory subsystems, and various memory technologies (DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5 etc.). 5 . Ensure that all designs comply with automotive industry standards and regulations, such as ISO 26262 and Automotive SPICE.

Main Requirements and Qualifications

• 1. Proven industry experience in the design and implementation of memory controllers/PHY.
• 2. Solid understanding of memory hierarchies, cache design and management.
• 3. Knowledge of system design and modeling tools.
• 4. Experience in designing and optimizing system level cache for automotive applications.
• 5. Previous experience with automotive-grade DRAM interface standards and memory technologies such as DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5 etc.
• 6. Familiarity with automotive safety standards such as ISO 26262.