Sima Technologies
MTS, Physical Design Professional
Skills
1 month ago
Share this opportunity
Share this opportunity to other talents of your network:
✓ Offer them a visibility boost with clients.
✓ Help your contacts find their next job.
Important information
Contract type:
Permanent
Location:
Bengaluru, Karnataka, India
Work mode:
Onsite
Published on:
20 September 2026
What they need
Description
Job Title: MTS, Physical Design
Job Location: Bangalore, India (This position requires a full-time, on-site presence in our Bangalore,
India Office)
Job ID: AI2532
Role & responsibilities:
- Hands-on Testchip/SoC/Full-chip floorplanning, integration and P&R alongwith P&R Flow Development.
- Establishes the integration plans for die with optimization for package and board constraints.
- Bump planning, Die file generation, closing loop with package team on signal and power bump placement restrictions.
- Derive specifications and collaterals for the IP blocks to execute the floorplan and automatic place and route (APR) at subsequent hierarchies.
- Have good understanding on, die-per-reticle / good-die-per-wafer maximization, and right technology selection on metal layers usage maximization.
- Performs integration of all dies in a package and completes the relevant checks before tape-out.
Minimum Requirements:
- BE/BTech with at least 10+ years of experience on high complexity SoC designs. At least one SoC in 7nm or lower.
- Demonstrating knowledge and implementation strategies to create an IO ring in accordance with design specifications.
- Possessing knowledge of ESD, latch-up, and other foundry requirements, as well as placement strategies.
- PG creation and push-down methodologies.
- Understanding Analog components and their placement requirements according to design specifications.
- Demonstrating RDL knowledge and working with packaging for SoC floorplan design.
- Following expertise is a plus:
- In-depth knowledge of Physical Verification tools like Synopsys ICV & Calibre Physical Verification Tools
- Knowledge of Package PV checks, IO/Bump PV cleanup, PV rules viz. Antenna, Density, DFM, DFY, DPT at lower technology nodes 7nm or less.
Personal Attributes:
Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
Other offers great for you!
These companies are also looking for great profiles
Advensia
Senior Frontend Engineer – Design System (React / Angular) – Freelance
415
Freelance
Bordeaux, France
Hybrid
Skills
5 hours ago
Quick apply
Ever T
Lead Full Stack Engineer TypeScript — IA & Agentic UI (React / Node.js)
Freelance
Paris, France
Hybrid
Skills
2 hours ago
Quick apply
Ever T
Développeur·se Full Stack Senior TypeScript — IA & Agentic UI (React / Node.js)
Freelance
Paris, France
Hybrid
Skills
2 hours ago
Quick apply