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Network-on-chip/interconnect Design -Staff Engineer

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Onsite

Network-on-chip/interconnect Design -Staff Engineer

Qualcomm

Network-on-chip/interconnect Design -Staff Engineer

2 months ago

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Important information


Contract type:

Permanent

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

24 August 2026

What they need


Job Area:
Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Network-on-chip (NoC)/ Interconnect Design and Architecture for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. The roles and responsibilities for this position includes but not limited to:-

  • Architecture and deployment of Next-gen Qualcomm coherent and non-coherent interconnect fabric
  • Responsible for specification, Micro-Arch, design and verification of interconnect and related IPs
  • Actively work with SoC Architecture, verification, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites
  • Partner with SoC performance team ensuring Interconnect meeting all performancerequirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions
  • Responsible for micro-architecting all relevant debug hooks in NoC Infrastructure to help root cause silicon issues
  • Will be part of BDC infrastructure (NoC/Interconnect) core team

Minimum Qualifications:

  • 8+ years of solid experience in IP/SoC design
  • Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts
  • Good knowledge ofRTL development and verification
  • Hands-on experience with SoC Design, Verilog RTL coding
  • Understanding of Verif is a plus
  • Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization.
  • Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug
  • Working knowledge of Lint, CDC, PLDRC, CLP etc
  • Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification
  • Manage SoC dependencies, planning and tracking of all front-end design related tasks
  • Driving the project milestones across the design, verification and physical implementations
  • Should possess effective communication and leadership skills

Minimum Qualifications:

Bachelor''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster''s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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