NPU Design

Who we are We are responsible for developing high-performance AI semiconductor (NPU) hardware for autonomous driving and robotics applications.

Responsibilities In this role, you will define architectures to run AI workloads for autonomous driving and robotics, design and verify RTL in accordance with the semiconductor design process, and develop NPU hardware.

■ Microarchitecture Definition

• Designing NPU microarchitectures optimized for deep learning workloads
• Design microarchitectures for key NPU components, including compute engines, buses, DMA, buffers, and control units
• Collaborate with the Compiler team

■ NPU RTL Design

• Designing RTL for NPU hardware architectures
• Design RTL for key NPU components, including compute engines, DMA, buffers, and control units
• Develop optimized RTL implementations to meet performance, power, and area (PPA) targets

■ Verification & SoC Development Collaboration

• Collaborating with SoC development and verification teams
• Analyze and resolve RTL-related issues identified during simulation and emulation
• Perform power and area analysis

■ Silicon Bring-up

• Validating NPU functionality at the silicon level and resolving issues in production-like environments
• Collaborate with software teams to validate NPU functionality during silicon bring-up activities
• Analyze and resolve issues identified in real-world operating environments

Minimum Qualifications

• Bachelor's degree or higher in Electronic Engineering, and Computer Engineering
• Minimum 3 years of RTL design using SystemVerilog or Verilog experience
• Experience across the full IP development lifecycle, from microarchitecture definition through RTL design and implementation
• Experience debugging RTL designs using Cadence, Synopsys, Siemens EDA simulation tools, and debugging environments
• Experience with industry-standard design quality checks, including Lint, CDC (Clock Domain Crossing), DFT (Design for Test), and logic synthesis tools

Preferred Qualifications

• Master’s degree or higher in Electrical Engineering, Computer Engineering, with a specialization in NPU design or a related field
• Minimum 3 years of experience at companies specializing in AI accelerators, such as NPUs or GPUs, or in related industries
• Proficiency in English (fluent in both written and oral business communication)
• Practical experience in NPU and/or GPU RTL design and development
• Experience in silicon production
• Experience in IP development in compliance with the functional safety (ISO 26262) process
• Experience using EDA tools, including Cadence Xcelium, Synopsys Verdi, Synopsys Design Compiler, and Synopsys VC SpyGlass
• Experience using Git

Others [Notes]

• In accordance with the employment protection laws, eligible candidates (disabled individuals, veterans, etc.) will receive preferential benefits during the process.
• Applications are accepted only through the Hyundai Motor Company career page, and any other methods are not allowed.
• The recruitment process may differ based on the timeline of the application submission, and the job post may close early if the position is filled.
• Additional assignments may be given during the interview rounds, if necessary.
• The recruitment schedule may be adjusted depending on the progress of the recruitment process.
• The expected position level specified in the job description may change based on each individual's experience and evaluation results.
• For any inquiries on recruitment, please refer to the [FAQs] or submit a ticket through '1:1 Inquiries' on our webpage.

[Precautions]

• If any of the following conditions apply, your acceptance may be revoked, or you may be subject to disadvantages in the selection process:
• If the information submitted during the recruitment process (including the application form) differs or cannot be proven in documentation
• If you are ineligible to work under company regulations
• If you are ineligible to travel abroad (for men, Korean nationals who have not completed military service or are not exempt from military service by the joining date)
• If you are unable to join the company on the start date designated by the company upon receiving the final offer
• Our company respects the trade secrets of third parties and strives to comply with relevant laws and regulations, such as The Unfair Competition Prevention and Trade Secret Protection Act. Please be careful not to disclose any confidential information related to your former/current workplace or to violate the confidentiality obligation of your former/current workplace, during the recruitment process. Violation may result in disadvantage in the recruitment process.

Position: Research Engineer, Senior Research Engineer