NPU Design Verification Engineer

• Verification environment development for AI processor, DSP and peripheral IP design. 2. Functional verification from module to IP-level 3. Develop test pattern for low power and performance analysis 4. Post-silicon debug and power/performance correlation 5. Emulator environment build up

Main Requirements and Qualifications

• 1. Familiar with UVM verification methodology and flow.
• 2. Familiar with AMBA bus and peripheral controller(for example DMA ...), and processor is a plus
• 3. Familiar with SOC integration and verification flow, FPGA is a plus
• 4. Familiar with Perl, C, Verilog, SystemVerilog.