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Packaging Process Engineer-Singapore

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Onsite

Packaging Process Engineer-Singapore

PICOHEART (SG) PTE. LTD.

Packaging Process Engineer-Singapore

Skills

R

8 days ago

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Important information


Contract type:

Permanent

Location:

Singapore

Work mode:

Onsite

Published on:

17 October 2026

What they need


About Us

Founded in 2012, ByteDance's mission is to inspire creativity and enrich life. With a suite of more than a dozen products, including TikTok, Lemon8, CapCut and Pico as well as platforms specific to the China market, including Toutiao, Douyin, and Xigua, ByteDance has made it easier and more fun for people to connect with, consume, and create content.

Why Join ByteDance

Inspiring creativity is at the core of ByteDance's mission. Our innovative products are built to help people authentically express themselves, discover and connect – and our global, diverse teams make that possible. Together, we create value for our communities, inspire creativity and enrich life - a mission we work towards every day.

As ByteDancers, we strive to do great things with great people. We lead with curiosity, humility, and a desire to make impact in a rapidly growing tech company. By constantly iterating and fostering an "Always Day 1" mindset, we achieve meaningful breakthroughs for ourselves, our Company, and our users. When we create and grow together, the possibilities are limitless. Join us.

Diversity & Inclusion

ByteDance is committed to creating an inclusive space where employees are valued for their skills, experiences, and unique perspectives. Our platform connects people from across the globe and so does our workplace. At ByteDance, our mission is to inspire creativity and enrich life. To achieve that goal, we are committed to celebrating our diverse voices and to creating an environment that reflects the many communities we reach. We are passionate about this and hope you are too.

Responsibilities

Team Introduction

The Silicon Platform Team acts as the core R&D middleware group for chip development within the company. The team covers the full spectrum of the chip design flow, including Logic Synthesis, Design for Testability (DFT), Backend Design, Physical and STA (Static Timing Analysis) Signoff, as well as Power Integrity, IR drop, and Electromagnetic Compatibility (Power/IR/EM). The team also oversees tape-out, mass production, packaging, testing, and board-level verification. They collaborate closely with front-end chip teams across business units to drive R&D progress and mass production deployment for chip.

Key Responsibilities

1. Process Integration Management : Serve as the sole interface between internal teams and OSATs, fabs, and substrate vendors to resolve process-related issues for 2D/2.5D/3D packaging projects.

2. Project Execution & Risk Control : Follow up with suppliers to meet process requirements, intervene in problem-solving, and ensure smooth production flow.

3. R&D Pre-research : For advanced R&D projects, lead process research, drive vendors to meet technical requirements, and conduct pre-verification of new packaging technologies.

4. Cross-team Collaboration : Coordinate with packaging design, thermal/stress simulation, and product teams to align process constraints and resolve cross-domain technical issues.

Qualifications

Minimum Qualifications

  1. Master's degree or above in Microelectronics, Electronics, Materials Science, Mechanical Engineering, or related fields, with at least 2 years of relevant work experience.

  2. Proven experience in 2D/2.5D/3D packaging process integration , with hands-on experience in at least one of the following packaging technologies: FCBGA, FCCSP, MCM, 2.5D, 3D.

  3. Familiar with packaging process flow, process design rules (DRM).

  4. Proficient in process problem-solving methodologies, with experience in leading root cause analysis and corrective action implementation for packaging process failures.

  5. Strong cross-team communication skills.

Preferred Qualifications

  1. Experience in mass production process integration for 2.5D or 3D packaging (TSV bonding, 3D stacking) projects.

  2. Experience in process optimization for advanced packaging technologies.

  3. Familiar with packaging reliability verification standards and thermal/stress simulation basics.

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