PCIe Characterization Engineer

Requirements:

• 5+ years post-silicon electrical characterization, HSIO validation, or memory electrical validation of SoC PHYs

• Hands-on ownership of PCIe or Ethernet and some experience with UFS or LPDDR5

• Lab fluency: high-speed oscilloscopes, BERT, VNA/TDR, protocol and logic analyzers; you have personally taken eyes, jitter, BER, and S-parameter data and used it to close a silicon issue

• Working knowledge of signal integrity, SerDes, silicon PVT sensitivity, and JEDEC / PCI-SIG / MIPI-UFS electrical specs

• Ability to read schematics and layout, debug at the probe point, and separate PHY vs. package vs. board vs. firmware

• Scripting for lab automation and data analysis (Python preferred)

• Clear written and verbal communication; you can present a margin plot and a root-cause story to design and program teams

Pay: $70.00 - $80.00 per hour

Expected hours: 40.0 per week

Work Location: In person