PCIe Silicon Validation & Debug Engineer

HCLTech is looking for a highly talented and self-motivated PCIe Silicon Validation & Debug Engineer to join it in advancing the technological world through innovation and creativity.

Job Title: PCIe Silicon Validation & Debug Engineer

Job ID: 134206

Position Type: Full Time

Location: Sunnyvale, CA

We are looking for a skilled PCIe Silicon Validation & Debug Engineer to join a Silicon Engineering team. The ideal candidate will have strong experience in PCIe protocol validation, test case development, pre-silicon/post-silicon validation, and silicon debug. This role will focus on ensuring functional correctness, performance, interoperability, and compliance of PCIe IP and SoC-level interconnects.

Responsibilities

• Develop and execute PCIe validation test plans and test cases.
• Debug PCIe protocol, link training, enumeration, and performance issues.
• Perform silicon bring-up and post-silicon validation.
• Automate test execution, regression, and log analysis using Python.
• Collaborate with hardware, firmware, BIOS, and design teams to resolve system-level issues.

Required Skills

• 4+ years of experience in PCIe validation, silicon validation, verification, or silicon bring-up.
• Strong understanding of PCIe protocol, preferably Gen3 through Gen5/Gen6.
• Hands-on experience writing test cases using C, C++, Python, SystemVerilog, or UVM.
• Experience with protocol analyzers such as Teledyne LeCroy, Keysight, or similar tools.
• Strong debugging, problem-solving, and documentation skills.
• Experience with Python, Perl, or Tcl scripting for automation, regression, and log parsing.

Preferred Skills

• Experience with CXL, NVMe, CCIX, UCIe, or other PCIe-based protocols.
• Experience with FPGA prototyping, emulation, or first silicon bring-up.
• Knowledge of signal integrity concepts such as S-parameters, jitter analysis, and eye diagrams.
• Familiarity with PCI-SIG compliance test suites.
• Understanding of BIOS/firmware interaction with PCIe subsystems.
• Background in SoC integration and system-level validation

Pay and Benefits

Pay Range Minimum: $78000/Year

Pay Range Maximum: $148000/Year

HCLTech is an equal opportunity employer, committed to providing equal employment opportunities to all applicants and employees regardless of race, religion, sex, color, age, national origin, pregnancy, sexual orientation, physical disability or genetic information, military or veteran status, or any other protected classification, in accordance with federal, state, and/or local law. Should any applicant have concerns about discrimination in the hiring process, they should provide a detailed report of those concerns to [email protected] for investigation.

A candidate’s pay within the range will depend on their skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program; 401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year

How You’ll Grow

At HCLTech, we offer continuous opportunities for you to find your spark and grow with us. We want you to be happy and satisfied with your role and to really learn what type of work sparks your brilliance the best. Throughout your time with us, we offer transparent communication with senior-level employees, learning and career development programs at every level, and opportunities to experiment in different roles or even pivot industries. We believe that you should be in control of your career with unlimited opportunities to find the role that fits you best.