Physical Design Engineer

Skills:

3+ years of exp in in Physical design engineer, VLSI.

Good knowledge of relevant script languages in PERL, Unix shell, Tcl, Python etc.

Job Description:

Must solid experience with memory technologies, and a desire to develop broader exposure to their downstream use in a dynamic, cutting-edge VLSI Synthesis environment. This role will provide key support for multiple projects in a globally distributed team. Responsibilities will include:

Read and understand documentation of and answer end-user question regarding Synopsys memory compilers Generate compiled memory views and perform quality assurance on those views for each released version. Perform program management, tracking action items and progress against due dates.

Experience and education:

Understanding of SRAMs and memory compilers (Synopsis Memory Compiler experience preferred) as well as VLSI design flow

Familiarity with memory design and views of memories, e.g. Verilog, timing (.lib), LEF, GDS

Familiarity with physical design verification, e.g. DRC and LVS

Able to perform and interpret circuit simulations, e.g. using SPICE

Ability to execute and modify scripts in PERL, Unix shell, Tcl, Python or related language.