Physical Verification Engineer

Why Ambit

Are you up for a career that throws challenges and at the same time gives you a sense of pride in what you do? Ambit offers it’s people the ideal platform to toil and grow in the semiconductor design profession. Our people have complete freedom to operate in their own flexible ways and support that help them to learn and enhance their skills further. Ambit firmly believes that for a company to grow big through innovation, its people must be given a free hand to experiment and innovate. The cheerful and bubbly work environment at Ambit portrays the commitment of the management for its people and their values. Come join us today for a bright future in semiconductor design services.

Qualification:

B.Tech / M.Tech or equivalent from a reputed University

Experience:

4 - 6 years of relevant experience

Job Description:

• Work with floorplan and physical design engineers to drive physical verification convergence.
• Should be proficient in DRC and LVS analysis at advanced nodes like 5nm or below.
• Good knowledge in specific areas like Antenna, ESD, ERC, LUP will be preferred.
• Working knowledge on full chip phyV will be added advantage.
• Prior work experience on FullChip RDL like IO/PADRing routing will be preferred.
• Understanding multi voltage regions will be preferred.

Tools:

• Expertise in Calibre/ICV and ICC2 tools.
• Scripting will be preferred.
• Scripting inside Calibre tool will be added asset.
• Automation [tcl, perl, python, etc,..]
• RDL experience
• Full chip/ subsystem LV experience in layout debug and fix
• Good PV-PD knowledge