Post Silicon Validation Engineer

Role & responsibilities

Requirements:

• Bachelors or Masters degree in Electronics & Communication or Electrical & Electronics

• Experienced Engineer with 2 to 5 years of experience in semi-conductor domain

• Hands-on experience with ATE Platforms like Teradyne / Advantest / NI Cohu

• Should have advance Knowledge of the ATE Tester, V93K is preferred

• Proficient in Basics of Electronics

• Good understanding of digital, analog, and mixed signal concepts

• Experience with board bring-up, debugging, and hardware characterization.

• Protocol Knowledge: I2C, SPI, UART, JTAG, and CAN

• Design and develop hardware solutions

• Schematic Capture, PCB Layout Review and Design Validation

• Experience in using bench instrumentation including Oscilloscopes, Logic Analyzers, Signal Generators, Spectrum Analyzers, Digital Multimeters, Power Supplies

• Proficiency in C++, VB, .NET, or C# programming

• Familiar with RF fundamentals and RF instruments with experience in silicon validation and

RF testing of PLL, PMIC, LDO, and RF transceiver devices.

• Knowledge on RF parameters like Gain, Noise figure, Harmonics, Isolation, S-parameters.

• Experience in preparing test plans, executing test cases, documenting results, and

generating technical reports.

• Experience in working with different teams to understand the project requirements and

develop solutions

• Proven track record of delivering projects on time while meeting quality

• analytical, troubleshooting, and root cause analysis skills.

Responsibilities:

• Work with design/DFT team to develop the detailed test procedure from device data sheet

• Design and develop the required test hardware - Load board, bench board, Qualification

board and probe card

• Develop, debug, and optimize ATE test programs for wafer sort and final test using industry-

standard test platforms

• First silicon verification and device bring up using ATE tools and bench equipment

• Device characterization across temperature, voltage and process corners and validate the

chip against the specification

• Responsible for releasing the Final production quality test program to the customer (both

wafer and package device test programs)

• Interactions with the Design/DFT team throughout the project execution

• Interact with the customer on a day-to-day basis and provide status update through e-mails,

meetings and conference calls

• Responsible from the beginning to the Final test/Wafer Test program release at customer

site