Spanidea
Post-Silicon Validation Engineer - PCIe
Skills
1 month ago
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Important information
Contract type:
Freelance / Contract
Location:
San Jose, CA, USA
Work mode:
Onsite
Published on:
14 September 2026
What they need
About the Role
We are seeking a driven and technically skilled Post-Silicon Validation Engineer to join our engineering team. In this role, you will play a critical part in the bring-up, validation, and characterization of advanced PCIe-based SoCs, switches, and retimers. You will work in a high-impact lab environment, collaborating closely with design, firmware, and signal integrity teams to ensure flawless high-speed serial connectivity and robust product performance.
Key Responsibilities
- Develop and execute comprehensive post-silicon validation plans for PCIe-based SoCs, switches, retimers, and high-speed connectivity products.
- Support active silicon bring-up, board-level validation, signal characterization, and deep-dive debug of PCIe devices.
- Validate PCIe functionality, system performance, interoperability, protocol compliance, and electrical margins.
- Build, scale, and maintain automated validation frameworks and test scripts using Python.
- Perform rigorous root-cause analysis for unexpected silicon and system-level behavior.
- Conduct performance characterization, margin analysis, stress testing, and optimization of high-speed data links.
- Analyze complex validation data and document results against strict product specifications.
- Collaborate dynamically with silicon design, architecture, firmware, hardware, signal integrity, and system engineering teams.
- Utilize high-speed lab equipment such as oscilloscopes, Bit Error Rate Testers (BERTs), Vector Network Analyzers (VNAs), and related measurement tools.
Qualifications & Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
- Professional experience in post-silicon validation, silicon validation, SoC validation, or system-level validation.
- Proven hands-on experience with PCIe architecture, protocol, debugging, and validation.
- Direct working experience with PCIe Switches and/or PCIe Retimers.
- Solid experience in silicon bring-up, post-silicon debug, electrical characterization, and root-cause analysis.
- Familiarity working with high-speed interfaces such as PCIe and Ethernet.
- Solid understanding of high-speed analog/digital concepts including PLL, CTLE, DFE, TX equalization, NRZ/PAM4 signaling, and signal integrity.
- Strong Python scripting and test automation capabilities.
- Experience with Git or similar source-control versioning tools.
- Demonstrated hands-on lab experience using BERTs, high-bandwidth oscilloscopes, VNAs, and advanced measurement instrumentation.
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