Ladders
Principal EDA R&D Engineer
Skills
1 month ago
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Important information
Contract type:
Permanent
Location:
United States
Work mode:
Onsite
Published on:
14 September 2026
What they need
For our client, we are seeking a Principal EDA R&D Engineer to join the team of a leader in the Telecommunications & Hardware space.
This role will drive advanced research and development efforts focused on formal verification and electronic design automation capabilities. The successful candidate will help shape next-generation AI-assisted methods for analyzing complex design spaces, improving verification workflows, and enabling large-scale build orchestration. This is a highly technical position with meaningful impact across research, engineering, and tool integration.
You will collaborate closely with cross-functional technical teams to turn algorithmic ideas into production-ready solutions that strengthen verification speed, scalability, and accuracy.
Location: Remote - US based candidates only, no visa sponsorship available
Compensation: $232,000 – $368,000 annually
Responsibilities
- Architect and advance new formal verification algorithms, including model checking and equivalence checking
- Design and deploy multi-agent AI systems that analyze and partition large design spaces
- Create orchestration layers for AI agents to manage large-scale builds
- Develop engines for generating complex System Verilog Assertions from natural language inputs
- Drive algorithmic research from inception to integration in EDA tool suites
Qualifications
- Ph.D. or Master's degree in Computer Science, Electrical Engineering, or a related field, or equivalent experience
- Minimum of 15 years of R&D experience in Electronic Design Automation (EDA) tools
- Deep understanding of formal methods such as bounded and unbounded model checking
- Expert-level C/C++ skills with a focus on high-performance computing and multi-threading
- Experience with Agentic AI pipelines and multi-agent systems
- Familiarity with RTL languages, including System Verilog and VHDL, and System Verilog Assertions (SVA)
Benefits
- Eligible for equity based on performance and position
- Access to cutting-edge technology in AI and hardware verification
- Collaborative work environment promoting innovation in EDA tools
- Exposure to high-stakes projects within leading technological areas
Our client is an equal opportunity employer. We encourage you to apply even if you don’t meet every qualification—your background could be exactly what this team needs.
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