Principal RF Design Engineer – Reading

We are searching for a Principal-level radio frequency integrated circuit (RFIC) design engineer to join and work within a dynamic RFIC design team. You will participate in the development of next generation RFIC products for 5G wireless communication networks.

RESPONSIBILITIES:

• Specify, design and verify key circuits and sub-systems of integrated RF transceivers
• Work closely with other teams to facilitate the design and production process, e.g. Software, Signal Processing, Product Integration, Sales & Marketing
• Provide broad technical expertise and mentor junior engineers within the team

PROFILE:

• Highly motivated, pro-active self-starter
• Strong sense of ownership and responsibility
• Creative thinker with strong problem-solving skills
• Team oriented attitude
• Ability to thrive in a multicultural environment
• Ability to communicate well with cross-functional teams
• Willingness to travel periodically between design centers in Europe
• Excellent written and oral communications skills in English
• Ability to communicate with remote design centers

REQUIRED EXPERIENCE:

• Engineering degree in a relevant discipline. MSc or equivalent, Ph.D. preferred
• 15 or more years’ experience of relevant IC development
• Recent successful RFIC project contributions on highly integrated RF transceivers, ideally related to broadband wireless communication systems, e.g. WiFi or LTE, on a nanometer scale RF-CMOS technology
• Understanding of low power/low noise design techniques for Analog and RF
• Knowledge of Design for Manufacture considerations on cutting edge processes
• Full appreciation of RF and baseband layout techniques
• Significant experience planning and tracking your own and others’ work, and mentoring and directing others

REQUIRED DETAILED KNOWLEDGE AT CIRCUIT LEVEL:

• Multi-band RF circuit design in the 700MHz to 5GHz range
• Proficiency in Cadence frontend and backend tools is absolutely required
• Familiarity with RF lab equipment such as signal generators, spectrum analyzers, and vector signal analyzers is required

PREFFERED DETAILED KNOWLEDGE AT SYSTEM LEVEL:

• RFIC system and architecture design, ideally for OFDM applications
• RFIC sub-system and block level definition & specification
• RFIC link budget / level plan analysis

ADDITIONAL USEFUL EXPERIENCE MAY INCLUDE:

• Integrated single chip RF + Digital baseband projects
• Top level chip simulation and functional verification
• Analog behavioral language modeling (e.g. Verilog-AMS)
• Mixed-mode simulation environments (e.g. mixed verilog and device level)
• Direct conversion Rx and Tx architectures and associated considerations
• DFT and BIST for analog and RF circuits
• Silicon test and de-bugging