Principal Technology Development Engineer

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Description 求人内容

• Drive the development of GDR/EDR for new design concepts, advanced layouts, and emerging process technologies during the first product implementation of a new process generation platform (mother device).
• Partner with Design, CMOS, and Process Engineering organizations to define product mask requirements and deliver manufacturing-ready mask data.
• Design test element groups (TEGs) and define design rules for next-generation CMOS development, enabling robust evaluation of new device structures, layouts, and process technologies.
• Drive improvement of CMOS characteristics toward mass production, including reliability enhancement, variability reduction, performance optimization, and manufacturability improvement.
• Evaluate design-process interaction risks at early development stages and establish optimized layout, CMOS design, and process solutions to maximize manufacturability, yield, and product robustness.
• Serve as the technical owner for GDR/EDR and CMOS design deliverables, defining technical direction, identifying technology gaps, establishing execution plans, and driving closure of critical issues through product-mask release.
• Drive cross-functional alignment among Design, CMOS, Process Integration, Device Engineering, Reliability, Product Engineering, Manufacturing, and joint-development partner organizations.
• Lead resolution of complex CMOS design, layout, and process-integration challenges, including design-rule conflicts, device reliability risks, variability, performance limitations, and interactions among layout, device design, and wafer processes, using structured and data-driven root-cause analysis.
• Develop and apply advanced methodologies for design-rule validation, TEG characterization, CMOS performance and reliability evaluation, variability analysis, statistical modeling, and automation to accelerate learning and improve development quality.
• Act as a key technical interface for global development activities, driving alignment and technical execution across organizations in Japan, international engineering teams, and joint-development partner organizations.
• Mentor, coach, and develop engineers in GDR/EDR, CMOS design, device engineering, and design-process integration by providing technical guidance, sharing domain expertise, fostering innovation, and cultivating the next generation of technical leaders 資格
• Ph.D. or M.S. degree in Electrical Engineering, Applied Physics, Materials Science, or a related field, with typically 10+ years of relevant semiconductor industry experience.
• Deep technical expertise in CMOS device design, semiconductor device physics, design-rule development, TEG design and characterization, layout verification, and design-process interaction. Experience with advanced NAND flash memory technologies is highly desirable.
• Demonstrated experience defining or developing GDR/EDR for new process technologies, advanced layouts, or first-product implementation of a new process generation platform.
• Demonstrated experience designing TEGs and defining design rules for next-generation CMOS technology development.
• Strong understanding of CMOS performance, reliability, variability, device and process interactions, manufacturability, yield-risk assessment, and requirements for mass-production readiness.
• Proven track record of leading and influencing complex cross-functional development programs involving Design, CMOS, Process Integration, Device Engineering, Reliability, Product Engineering, and Manufacturing organizations.
• Demonstrated ability to identify and resolve highly complex CMOS design, layout, and process-integration challenges and to drive technical alignment across organizations without direct managerial authority.
• Experience with design-rule checking, layout analysis, device characterization, reliability evaluation, statistical analysis, computational modeling, and automation tools is highly desirable.
• Demonstrated success working within global teams and leading collaborations across multiple geographic regions and joint-development partner organizations.
• Strong English communication and presentation skills are required. While Japanese proficiency is not required at the time of hire, candidates are expected to actively and independently learn Japanese and aim to achieve effective working-level communication in Japanese within approximately two years.
• The individual must be self-motivated and self-directed, with a demonstrated ability to influence, collaborate, make sound technical judgments, and drive outcomes across organizational boundaries

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.