Process Integration Development Engineer - Advanced Parking

Compensation: 190K–250K base salary + Equity + Bonus (specific terms to be determined)

Employment Type : Full-time

Work Arrangement: Remote (U.S.-based)

Travel : 50%+ international travel, including potential extended stays of up to three months during the first year

About the Company:

We are an early-stage technology company developing innovative solutions for advanced semiconductor packaging and heterogeneous integration. Our work focuses on addressing thermal management and power-density challenges in next-generation semiconductor systems, supporting the continued growth of AI infrastructure and advanced computing.

We are building a founding technical team to develop and validate next-generation packaging technologies, offering the opportunity to contribute to challenging engineering programs and help shape the company's technical direction.

About the Role:

We are seeking a Director, Process Integration & Development to lead advanced semiconductor packaging process development and integration, with a focus on patterning, bonding, and chemical mechanical planarization (CMP).

This is a hands-on technical leadership position for an experienced engineer who can independently solve complex integration challenges, build processes from the ground up, and lead technical development while remaining directly involved in laboratory and process execution.

You will help establish the process integration function, guide technology development from early-stage R&D toward manufacturing readiness, and collaborate with engineering teams and international development partners.

Key Responsibilities:

Lead process integration and development for advanced semiconductor packaging technologies.

Develop, optimize, and integrate patterning, bonding, and CMP processes.

Define technology roadmaps and integration strategies for next-generation packaging platforms.

Independently troubleshoot and resolve complex process integration challenges.

Lead cross-functional technical programs, managing project schedules, milestones, risks, and resources.

Build and mentor engineering teams while remaining hands-on in process development and laboratory work.

Support technology transfer, pilot production, manufacturing readiness, and improvements in yield and cycle time.

Evaluate emerging materials, equipment, and process technologies.

Collaborate with customers, equipment and materials suppliers, and development partners on technical reviews and technology roadmaps.

Requirements

:

MS or PhD in Materials Science, Electrical Engineering, Chemical Engineering, Mechanical Engineering, Physics, or a related field.

5+ years of experience in advanced semiconductor packaging or semiconductor process development.

Hands-on experience with patterning, bonding, and CMP processes.

Demonstrated experience in both process development and process integration.

Strong understanding of wafer-level manufacturing.

Proven ability to independently solve complex integration problems from diagnosis through validation.

Experience leading technical teams or engineering functions while remaining directly involved in hands-on process execution.

Ability to work effectively in an early-stage environment with evolving processes and technical uncertainty.

Existing authorization to work in the United States without requiring employer sponsorship.

Willingness and ability to travel internationally 50%+ of the time, including potential extended stays of up to three months during the first year.

Preferred Experience:

Experience in one or more of the following areas is desirable:

Hybrid bonding, Cu-Cu direct bonding, oxide bonding, thermal compression bonding (TCB), or temporary bonding.

Chiplet integration, 2.5D/3D IC integration, TSV/TxV, fan-out packaging, or panel-level packaging.

Wafer thinning, CMP, plasma activation, surface preparation, or surface chemistry.

Lithography, etching, cleaning, thin-film deposition, electroplating, or metallization.

High-bandwidth memory (HBM) integration or co-packaged optics.

Dielectric deposition, semi-additive processing (SAP), or dual-damascene processes.

Metrology, characterization, thermal management, package reliability, or process optimization.

Design of experiments (DOE), statistical process control (SPC), JMP, Minitab, Python, or MATLAB.

Compensation & Benefits:

Equity participation and a bonus opportunity; specific structures and terms are to be determined.

Medical, dental, and vision insurance.

Paid time off and paid holidays.

401(k) with employer match.

The opportunity to join a founding technical team, build a function from the ground up, and contribute to advanced semiconductor packaging technologies relevant to next-generation AI infrastructure.

Interested in building next-generation semiconductor packaging technology? Apply to explore this opportunity to combine technical leadership, hands-on engineering, and founding-team ownership.