Quantum Computing & Advanced Packaging Process Engineer(電光所_量子電腦及先進封裝製程工程師)

【Job description 工作內容】

1. 參與量子電腦封裝結構設計、製程整合與關鍵技術開發，推動新世代量子封裝技術研發。

2. 負責半導體先進封裝製程整合與開發，涵蓋 3D IC、CoWoS、InFO 等先進封裝技術之流程建置與製程優化。

3. 參與光學共封裝（Co-Packaged Optics, CPO）製程整合與技術開發，支援高速運算與光電整合應用。

4. 協助政府科技專案及產業合作計畫之規劃、執行與成果推動，參與前瞻技術研發與產業應用落地。

5. Develop quantum computing packaging structures, process integration technologies, and key technologies for next-generation quantum packaging.

Develop and integrate advanced semiconductor packaging processes, including 3D IC, CoWoS, and InFO, with a focus on process development and optimization.

2. Develop and integrate Co-Packaged Optics (CPO) processes for high-speed computing and optoelectronic integration applications.

3. Support government-funded R&D programs and industry collaboration projects, contributing to advanced technology development and commercialization.

【資格條件 Job Requirements】

1. 碩士（含）以上學歷，物理、電機、電子、光電、材料或半導體等相關科系畢業；具博士學位者尤佳。

2. 具半導體先進封裝製程整合相關經驗（如 3D IC、CoWoS、InFO 等）者佳。

3. 具光學共封裝（Co-Packaged Optics, CPO）或光電異質整合相關技術經驗者佳。

4. 具量子元件、量子運算或量子相關研究經驗者佳；歡迎對量子電腦及先進封裝技術具高度興趣之跨領域人才加入。

5. Master's degree or above in Physics, Electrical Engineering, Electronics Engineering, Photonics, Materials Science, Semiconductor Engineering, or related disciplines. Ph.D. holders are preferred.

6. Experience in advanced semiconductor packaging and process integration, such as 3D IC, CoWoS, or InFO, is a plus.

7. Experience in Co-Packaged Optics (CPO) or heterogeneous photonic integration is a plus.

8. Experience or research background in quantum devices, quantum computing, or related fields is a plus. Candidates from interdisciplinary backgrounds with a strong interest in quantum computing and advanced packaging are welcome to apply.