Research Engineer (Next-Gen Computing Architecture)

We have partnered with a renowned global leader in information and communications technology (ICT) infrastructure and smart devices. They are providing full-stack, all-scenario AI solution for products and services carriers, enterprises, governments, and individual consumers worldwide.

Our client is seeking a Research Engineer in Next-Generation Computing Architecture to join their growing research team in Singapore focused on next-generation computing architecture.

In this role, you will contribute to systems and architecture research for emerging AI workloads -- from efficient inference for agentic workloads to heterogeneous resource pooling, tiered memory, and hardware–software co-design. You will have the opportunity to define research problems, develop system prototypes, and translate frontier research into practical technologies. The role also involves close collaboration with researchers and engineering teams at leading local universities and industry partners.

Key Responsibilities

• Conduct systems and architecture research for LLM and agentic workloads, including inference serving, scheduling, KV cache and state management, and the memory/storage hierarchy.
• Characterize real workloads and develop performance models and simulation frameworks to guide architectural design-space exploration.
• Design and implement system prototypes, and conduct end-to-end evaluations to validate key technical ideas and hypotheses.
• Participate in hardware–software co-design, collaborating with chip, compiler, and system software teams to bring solutions into practice.
• Track the research frontier, contribute to joint research projects with universities, and publish at top-tier conferences.

Qualifications & Requirements

• Master's or PhD in Computer Architecture, Computer Science, Operating Systems, Distributed Systems, Compilers, EDA, or a related field.
• Strong technical background in one or more of the following: large-model inference and training systems, GPU/NPU accelerator architecture, memory and storage systems, high-performance networking and interconnect, compilers and runtimes, or chip design and verification.
• Strong programming and engineering skills in C/C++ and Python, with experience in CUDA or comparable toolchains, and a proven ability to take projects from prototype development through performance evaluation.
• A strong publication record in top-tier conferences such as ISCA, MICRO, ASPLOS, HPCA, OSDI, SOSP, NSDI, EuroSys, MLSys, or DAC.
• Strong communication and collaboration skills, with the ability to work effectively across teams and institutions.

Interested candidates, who wish to apply for the advertised position, please click on "Apply Now". We regret that only shortlisted candidates will be notified.

EA License No.: 01C4394

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