RTL & FPGA Design engineer

About the Opportunity

We are seeking an RTL Design Engineer to support a leading semiconductor and wireless technology company.

This role focuses on RTL design, simulation verification, FPGA bring-up, SoC/FPGA platform debugging, and hardware validation to deliver robust FPGA solutions.

Key Responsibilities

· Collaborate with cross-functional groups to define technical requirements and resolve technical challenges for FPGA solutions.

· Design, implement, and verify RTL designs in simulation environments, and support FPGA bring-up.· Debug FPGA platforms with SoC and validate RTL designs in hardware.

· Gather technical requirements during product definition and ensure implementation in platforms and documentation.

Preferred Experience

· Intermediate with Verilog and/or System Verilog

· 2+ years of RTL Design

· Experience for FPGA or ASIC· Experience with FPGA Debug in Simulation and/or HW Bring up

· Experience with one of the scripting languages (Python, Perl, TCL, Bash, etc.)

· Strong Communication and problem solving skills· Must be a self-starter, and able to independently drive tasks to completion

Work Environment

This is an onsite role based in Penang, Malaysia, involving close collaboration with cross-functional engineering teams and hands-on FPGA/RTL debug and validation.

Interested candidates: Apply through LinkedIn to be considered for this opportunity.