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Security Verification Engineer

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Onsite

Security Verification Engineer

Proxelera

Security Verification Engineer

Skills

PythonGitCompliance

6 months ago

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Important information


Contract type:

Permanent

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

14 October 2026

What they need


Job highlights

  • Experience in developing testbenches,test plans,and verification environments . Understanding of IPsec and MACsec protocols .
  • Familiarity with compliance standards or certification flows . . Disclaimer : This job posting has been aggregated from external source
  • Experience: 3 6 Years in Security protocol verification

Job Title: Security Verification Engineer - 3-6 Yrs Location: Bangalore
Experience: 3 6 Years in Security protocol verification

We are looking for a Security Verification Engineer with strong expertise in verifying hardware security features and cryptographic protocols. The role involves validating secure IPs and ensuring compliance with industry-standard security algorithms and protocols.

Key Responsibilities:

  • Develop and execute verification plans and test strategies for security IPs and subsystems

  • Verify implementations of cryptographic algorithms such as AES-256, RSA, SHA, TRNG, and PUF

  • Build and maintain SystemVerilog/UVM-based testbenches (TB) for security verification

  • Develop directed and constrained-random test cases for functional and corner-case validation

  • Perform protocol-level verification for IPsec and MACsec

  • Validate security features like encryption/decryption, key management, authentication, and secure boot

  • Debug failures, analyze waveforms/logs, and identify root causes

  • Work closely with design and architecture teams to ensure security compliance and coverage closure

  • Define and track functional, code, and security coverage metrics

    Required Skills:

  • 3 6 years of experience in Design Verification (DV) , preferably in security domain

  • Strong knowledge of cryptographic algorithms ( AES-256, RSA, SHA ) and security primitives ( TRNG, PUF )

  • Experience in SystemVerilog (SV) and UVM

  • Experience in developing testbenches, test plans , and verification environments

  • Understanding of IPsec and MACsec protocols

  • Familiarity with assertions (SVA) and coverage-driven verification methodologies

  • Strong debugging skills with industry-standard simulators (VCS, Questa, Xcelium)

    Preferred Qualifications:

  • Experience in hardware security/IP verification or secure SoC design

  • Knowledge of side-channel attack mitigation or fault-injection testing

  • Exposure to formal verification techniques

  • Scripting skills (Python/Perl/Shell)

  • Familiarity with compliance standards or certification flows .

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

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