Xsight Labs
Senior 112G / 224G SerDes Validation Engineer
Skills
2 months ago
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Important information
Location:
Kiryat Gat, Israel
Work mode:
Onsite
Published on:
17 August 2026
What they need
We are looking for a hands-on ETH SerDes Validation Engineer to lead and execute 112G
and next-generation 224G SerDes validation activities.
The role involves deep lab work with Keysight test equipment, automation development,
and direct execution of compliance and characterization tests according to industry standards.
This position is ideal for an engineer who combines strong signal-integrity fundamentals,
standards expertise, and automation-driven validation in high-speed silicon and system
environments.
Key Responsibilities
Perform end-to-end validation of 112G / 224G SerDes PHYs at silicon, package, and
system levels
Execute compliance, characterization, and stress tests for high-speed serial links
Operate and configure Keysight high-speed test equipment, including:
o BERTs, oscilloscopes, AWGs, jitter sources, channel emulators (variable ISI)
Develop and maintain automation frameworks for SerDes validation:
o Test setup control
o Data collection
o Result analysis and reporting
o Python
o Shell scripts under Ubuntu
o SQL skills for data analysis
Execute and analyze:
o Eye diagrams, jitter (RJ/DJ/TJ), BER, bathtub curves
o CTLE/DFE behavior
o TX FIR optimization
o Channel loss and margin analysis
Debug signal-integrity issues across:
o Silicon
o Package
o PCB
o Connectors and cables
Work according to industry standards, including:
o IEEE (112G / 224G PAM4)
o Ethernet (802.3ck / 802.3db and beyond)
Collaborate closely with:
o Design teams (SerDes / PHY)
o SI/PI engineers
o System and board design teams
Document test methodologies, results, and recommendations clearly
What We Offer
Work on cutting-edge 112G / 224G SerDes technologies
Direct impact on next-generation silicon and systems
Advanced lab environment with state-of-the-art Keysight equipment
Highly technical, expert-level team
Competitive compensation and benefits
Location in Kiryat Gat with access to major semiconductor programs
Requirements:
5+ years of experience in high-speed SerDes validation or signal-integrity roles
Hands-on experience with 112G PAM4 SerDes validation
Strong working knowledge of Keysight validation platforms (BERTs, scopes,
automation APIs)
Proven ability to write automation scripts
o Python
o Shell scripts
o SQL for Data Analysis
Deep understanding of:
o PAM4 signaling
o Jitter decomposition
o BER and margining techniques
o Channel loss and equalization
Solid understanding of high-speed standards (Ethernet, IEEE, OIF)
Comfortable working independently in the lab and driving issues to closure
Experience with 224G SerDes validation or early silicon bring-up
Familiarity with Keysight N5991 / 8040 / 8160 / PNA / M8040A platforms
Experience validating:
o 112G / 224G Ethernet
Experience with compliance test specifications and interoperability testing
B.Sc. or M.Sc. in Electrical Engineering or equivalent
Required experience:
5+ years of experience in high-speed SerDes validation or signal-integrity roles
Hands-on experience with 112G PAM4 SerDes validation
Strong working knowledge of Keysight validation platforms (BERTs, scopes,
automation APIs)
Proven ability to write automation scripts
o Python
o Shell scripts
o SQL for Data Analysis
Deep understanding of:
o PAM4 signaling
o Jitter decomposition
o BER and margining techniques
o Channel loss and equalization
Solid understanding of high-speed standards (Ethernet, IEEE, OIF)
Comfortable working independently in the lab and driving issues to closure
Required skills:
Experience with 224G SerDes validation or early silicon bring-up
Familiarity with Keysight N5991 / 8040 / 8160 / PNA / M8040A platforms
Experience validating:
o 112G / 224G Ethernet
Experience with compliance test specifications and interoperability testing
Required Education::
B.Sc. or M.Sc. in Electrical Engineering or equivalent
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