Allegis Group
Senior Design Verification Engineer
Skills
18 days ago
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Important information
Contract type:
Permanent
Location:
Bengaluru, Karnataka, India
Work mode:
Onsite
Published on:
6 October 2026
What they need
Hiring: Senior Design Verification Engineer | Bangalore | 5-12 Years
We are looking for an experienced Senior Design Verification Engineer to join Product company a high-performance verification team working on advanced IP/SoC verification projects.
Mandatory Skills
SystemVerilog & UVM with strong IP Verification experience
AXI Protocol Verification (AXI4/AXI4-Lite/AXI-Stream)
Regression Triaging & Root Cause Analysis
Functional Coverage, Assertions, Scoreboards, Checkers
RTL Debug, Waveform Analysis, Verification Sign-off
Good to Have
PCIe Gen3/Gen4/Gen5 Verification
Experience with AI tools such as Copilot, ChatGPT, Claude, Gemini
Verification Automation & Prompt Engineering
Key Responsibilities
- Develop reusable UVM-based verification environments.
- Create directed and constrained-random test scenarios.
- Drive code, functional, assertion, and toggle coverage closure.
- Perform regression triaging and debug complex failures.
- Verify AXI and PCIe-based IPs/subsystems.
- Collaborate closely with Design, Firmware, and Architecture teams.
- Utilize AI-driven solutions to improve verification productivity and debug efficiency.
Experience
5-12 Years
Location
Bangalore
Notice Period
Immediate to 30 Days Preferred
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