T-FOOTPRINT
Senior DFT/DFX Engineer
Skills
1 month ago
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Important information
Contract type:
Permanent
Location:
Bayan Lepas, Penang, Malaysia
Work mode:
Onsite
Published on:
23 September 2026
What they need
The Role
We are looking for a DFT / DFX Engineer with 3+ years of experience to support the development and implementation of test and design-for-testability features for advanced SoC designs. You will be involved in DFT architecture, scan and memory test implementation, ATPG, test pattern development, and DFT verification, while working closely with design, physical design, and validation teams to ensure testability, coverage, and production readiness.
Key Responsibilities
- Participate in SoC-level DFT/DFX architecture and test strategy definition.
- Implement DFT features including Scan, Boundary Scan, MBIST.
- Perform scan insertion, test clock/reset implementation, test compression, and related DFT integration.
- Develop and optimize ATPG and production test patterns to achieve target test coverage and test efficiency.
- Generate and validate DFT timing constraints, and work with physical design teams to resolve scan-related timing and implementation issues.
- Support DFT flow development and automation using scripting languages such as Tcl and Python.
- Support post-silicon bring-up and ATE-related debug, including analysis of scan/test failures where required.
- Evaluate and establish DFT tools, methodologies, and flows to improve test quality and efficiency.
- Collaborate with RTL, physical design, verification, and validation teams to ensure successful DFT integration and production readiness.
Required Qualifications
- Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering, or a related field.
- 3+ years of hands-on experience with DFT/DFX methodologies, including Scan, ATPG, MBIST, Boundary Scan, or related techniques.
- Good understanding of digital SoC/ASIC design, including RTL, STA, and design verification concepts.
- Familiarity with industry-standard DFT tools such as DFTMax, TestMAX, TetraMAX, Tessent, FastScan, or equivalent tools.
- Experience with Verilog/SystemVerilog; familiarity with VHDL is an advantage.
- Proficiency in Tcl, Python, Perl, or other scripting languages for flow automation and analysis.
- Good understanding of DFT timing, test constraints, and scan-related implementation considerations.
- Strong analytical, debugging, and problem-solving skills.
- Good English communication skills and ability to work effectively in a cross-functional team.
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