Senior FPGA Designer (IP Development)

Technical Competencies:

·       Proficiency with HDL design such as Verilog, System Verilog, and VHDL.

·       Experience working with standard FPGA development tools for various vendors:

o    AMD / Xilinx – Vivado, Vitis, etc.

o    Altera – Quartus

o    Lattice – Diamond, Radiant, etc.

·       Experience working with simulation tools such as ModelSim and / or QuestaSim.

·       Familiar with various high-speed interfaces such as PCIe, Ethernet (L1 – L4), USB, DDR, LVDS, etc.

·       Familiar with various low speed interfaces such as SPI, I2C, UART, etc.

Job Requirement:

·       Bachelor degree in Electrical/Electronic engineering or equivalent.

·       Minimum 1-5 years of direct working experiences in FPGA HDL/IP design experience.

·       Fluent in both written and spoken English, ability to work in an international team.

·       Good teamwork attitude, collaboration and communication skills.