Job Description Summary

Job Description

Role Overview

As a Senior FPGA Engineer within the FACTS NPI team in Tampere, you will serve as a technical lead for high-complexity firmware projects. In this role, you will transition from individual task execution to driving architecture, mentoring team members, and ensuring the technical integrity of our power electronics control systems. You will play a pivotal role in the New Product Introduction (NPI) cycle, bridging the gap between high-level system requirements and robust, field-ready FPGA implementations.

Key Responsibilities

• Technical Leadership: Lead the design and implementation of complex FPGA architectures for FACTS and STATCOM applications, ensuring high performance, scalability, and maintainability.
• System Ownership: Take full ownership of the firmware development lifecycle, from initial system-level requirement analysis to final RTDS validation.
• Advanced Problem Solving: Drive the root-cause analysis of complex timing, logic, or integration issues, acting as the primary point of contact for deep-technical debugging.
• Design Excellence: Set standards for RTL design, verification methodologies, and code reviews; ensure all firmware meets rigorous grid-stability and quality standards.
• Cross-Functional Collaboration: Serve as a subject matter expert (SME) in collaboration with hardware, software, and systems engineering teams globally.
• Mentorship: Provide guidance and technical oversight to junior engineers, promoting best practices in FPGA design and VHDL/Verilog development.
• Process Improvement: Lead the evolution of development workflows, including CI/CD integration for firmware, requirements traceability, and documentation standards.

Required Qualifications

• Education: M.Sc. or B.Sc. in Electrical Engineering, Computer Science, or related field.
• Experience: Proven, extensive experience in FPGA development (VHDL/Verilog) with a track record of delivering successful projects in complex technical environments.
• Tooling Expertise: Mastery of FPGA design tools (Intel Quartus/Xilinx Vivado) and advanced simulation/verification environments.
• Leadership: Demonstrated ability to lead projects or workstreams within a matrix organization.
• Communication: Excellent proficiency in English and the ability to articulate complex technical concepts to non-specialist stakeholders.

Preferred Technical Competencies

• Expertise in DSP implementation and high-speed digital design/timing closure.
• Deep understanding of SoC FPGA architectures (e.g., Zynq, Stratix/Arria).
• Proven experience in the energy, grid, or power systems sector (HVDC/FACTS).
• Advanced proficiency in hardware-software interface design for real-time control.

Additional Information

Relocation Assistance Provided: No