Senior IP Design Engineer

In this role, you will be responsible for developing high-quality, reusable IPs for SoC/subsystem integration and driving designs from concept through silicon. This position offers an opportunity to work on cutting-edge semiconductor technologies and collaborate with global cross-functional teams.

Key Responsibilities Work with architecture teams and put up the micro-architecture based on the IP requirements

Develop RTL using Verilog/SystemVerilog/VHDL based on micro-architectural specifications

Translate system-level requirements into high-quality IP designs

Optimize designs for power, performance, and area

Perform design checks such as Lint, CDC, synthesis, and STA

Drive bug fixing and closure

Support design reviews and sign-off processes

Collaborate with verification teams on test plans and coverage closure

Required Skills Strong experience in RTL design (Verilog/SystemVerilog/VHDL)

Solid understanding of SoC/IP design and integration

Hands-on experience with:Lint, CDC, synthesis, timing analysis

Experience in Low-power design techniques

Preferred Skills Experience in full-cycle IP/SoC development

Exposure to formal verification or low-power flows

Experience with post-silicon validation and bring-up

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