Senior PCIe Compliance Electrical Validation Technician

Job Summary

We are looking for an experienced validation engineer with 6+ years hands-on PCIe / high-speed interface validation background . You will own PCIe Gen5/Gen6 post-silicon electrical validation, platform bring-up, compliance testing and failure debug. You will operate high-speed test instruments, troubleshoot link and signal integrity issues, and conduct interoperability testing for PCIe retimers and switches. Script automation experience is preferred.

Responsibilities

1. Build, bring up and stabilize PCIe test platforms for PCIe Gen5 / Gen6.
2. Perform PCIe electrical & compliance validation following PCI-SIG / CEM specifications.
3. Operate high-bandwidth oscilloscopes and BERT systems (Keysight / Tektronix / LeCroy) with compliance fixtures; run eye diagram, jitter, BER, receiver margining and signal integrity measurements.
4. Debug failures on link training, enumeration, speed/lane degradation and electrical compliance. Analyze TX/RX/Refclk, equalization, LTSSM and SerDes signal integrity issues.
5. Conduct interoperability testing for PCIe retimers and PCIe switches.
6. Develop automation scripts using Python, Bash, Perl or PowerShell to streamline validation test flows.

Required Qualifications

1. Minimum 6 years hands-on PCIe / high-speed interface validation experience; solid PCIe Gen5 / Gen6 compliance experience.
2. Deep understanding of PCIe architecture: TX/RX/Refclk, LTSSM, link training, equalization, BER, jitter, eye diagram and signal integrity.
3. Practical experience with BERT and high-bandwidth oscilloscopes; familiar with Keysight, Tektronix or LeCroy test equipment and compliance fixtures.
4. Post-silicon silicon validation experience, proven capability to debug PCIe link and electrical compliance failures.
5. Hands-on experience with HSIO / SerDes validation.
6. Basic scripting skills: Python, Bash, Perl or PowerShell.

Preferred Qualifications

1. PCIe Gen6 PAM4 and FEC knowledge.
2. Hands-on experience with PCIe retimers, PCIe switches and interoperability testing.