T
Tenstorrent
Senior Performance Infrastructure Engineer
Skills
Python
2 months ago
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Important information
Contract type:
Permanent
Location:
Austin, TX, USA
Work mode:
Onsite
Published on:
22 August 2026
What they need
- We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design
- Join a team driving improvements in CPU microarchitecture, verify performance and correlate with the RTL
- Enhance design environment, tools, and methodologies to improve development efficiency
- Collaborate closely with RTL engineers and core architects to meet performance goals, debug miscorrelation and verify performance features
- Use innovative techniques to optimize power, performance, and area while driving performance experiments and evaluating results
- What You Will Learn:
- End-to-end exposure to CPU design from microarchitecture through performance convergence and validation
- Hands-on experience optimizing CPU designs in both pre-silicon and post-silicon phases
- Integration of open-source and industry-standard tools to improve flows and results
- Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges- Skilled in C++ and Python, with an understanding of industry-standard tools for compilation, simulation and emulation
- Proficient in debugging RTL/logic across multiple design hierarchies and pre-silicon environments
- Knowledgeable in architecture and microarchitecture of high-performance CPU cores
- Great at identifying problems and developing solutions
- Ideal candidates would possess experience in infrastructure, methodology and performance verification
- Enjoys building tools and optimizing work flows
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