Senior Signal Integrity Engineer

Key Responsibilities

Analyze & Simulate High-Speed Interfaces: Perform end-to-end SI analysis and electromagnetic modeling for high-speed buses (PCIe, Ethernet, SerDes) using industry-standard simulation tools.

Guide PCB Design & Layout: Establish layout guidelines, stack-up strategies, and routing rules for complex, multi-layer boards to minimize impedance mismatches, crosstalk, and noise.

Validate in the Lab: Bring designs from concept to reality by performing hands-on hardware characterization and testing using VNAs, oscilloscopes, TDRs, and protocol analyzers.

Innovate Engineering Processes: Help refine SI methodologies, improve design workflows, and integrate emerging high-speed data transmission technologies into future architectures.

Core Qualifications & Skills

Experience: 5+ years in Signal Integrity, high-speed PCB design, or hardware engineering.

Technical Mastery: Deep knowledge of signal transmission principles (impedance matching, crosstalk, attenuation, noise mitigation) and high-speed buses (Ethernet, PCIe, SerDes).

Software Tools: Proficiency with SI simulation platforms such as Ansys (HFSS/CST), Keysight ADS, HyperLynx, and Cadence Allegro.

Lab Expertise: Proven ability with advanced lab testing tools (VNA, Oscilloscope, TDR, Protocol Analyzers).

Education: B.S. or M.S. in Electrical Engineering, Electronics Engineering, or a related technical field.