瑞昱半導體股份有限公司
Senior SoC Verification Engineer
8 months ago
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Important information
Location:
Taiwan
Work mode:
Onsite
Published on:
25 September 2026
What they need
Location : 新竹科學園區
Work experience : 2 year
Education : 大學
Job Description:
1.Joining in specification definition, designing verification
platform, developing behavioral models, and responsible for
system and functional verification
Qualification
1.BS or above, majoring in EE, CS or related fields
2.at least 2 years experience in IP/SoC Verification
3.Familiar with hardware description language (Verilog) and
verification language(Vera/Specman/PSL/Open Vera)
4.Experience in IC design is a plus
5.Knowledge in multimedia systems is a plus
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