Senior Staff Engineer Analog Layout (RF Layout)

About the role

Work closely with RF Designers to iterate circuit layouts to achieve performance. Perform critical circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso--VXL & Mentor Calibre) and techniques in advanced RF node processes.

Key responsibilities

• Participate in layout design of RF circuits (block/IP/chip) floor planning from scratch, performing routing & layout verification and resolve violations
• Lead/co-lead the physical layout of IP of RF layout design by working closely with cross functional team leader
• Conduct thorough layout design reviews internally & external review with circuit designers
• Plan overall project schedule and distribute tasks to project team members
• Guide and coach junior engineers for on time delivery & quality

About you

• Bachelor's degree in electrical/Electronic Engineering/Physics with VLSI exposure or equivalent 8 to 15 years of job experience in RF layout design field
• Hands on experience in RF layout from scratch
• Knowledge & experience in radio frequency (RF) layout is mandatory
• Strong expertise in leading in one or more of the following IP Layouts - RF modules (high frequency circuits) – LNA, Mixer, PA, VCO for WLAN, BT chip
• Experience with layout design and verification of high-performance RF transmitter, receiver, PLL subsystems
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies
• Expertise on matching, parasitic reduction, ESD, DFM etc.
• Strong technical, analytical & problem-solving skills in analog layout design
• Capable in driving ideas towards implementation for layout productivity, quality and methodology improvement
• Ability to work as strong team player and participate in cross-functional activities