Senior Staff Technical Program Manager (NPI)

• NVIDIA Vera Rubin deployments begin in early 2027. We are hiring the Senior Staff TPM who will own that generation introduction. Not manage a workstream inside it, but define and drive the entire NPI engagement model from chip vendor engagement through first customer cluster delivery
• This is a generation-level program, not a SKU-level one. Vera Rubin represents a fundamental architectural transition: new networking topology, new storage implications, new commissioning gate framework, and compounding cross-SKU dependencies running in parallel with active production deployments
• The Senior Staff TPM owns all of that: the technical depth to define what the NPI model should look like, the organizational influence to make it happen across engineering, hardware partners, and DC operations, and the portfolio awareness to protect active production programs while standing up a new generation
• Own the Vera Rubin generation introduction end-to-end: chip vendor and OEM dependencies, architecture updates (networking topology, storage), cloud foundations work, commissioning gate framework definition, and first customer cluster delivery as the success metric
• Define the NPI engagement model for a new GPU generation: what changes architecturally from Grace Blackwell to Vera Rubin, what the commissioning gate framework needs to look like, and where standard hyperscaler NPI processes are broken and need redesign
• Lead NPI Phase 0 on the Cloud TPM side: define firmware version targets and DOCA targets before kickoff, set commissioning gate criteria (G0–G6), name the DRI matrix, and publish the node allocation plan with block-scheduled tasks
• Manage compounding cross-SKU dependencies where active B200/GB300 production programs are running in parallel with Vera Rubin NPI, and prevent them from competing for the same specialist pool without a plan
• Maintain portfolio-level situational awareness across NPI programs, active production deployments, and cloud foundations work, holding an accurate mental model of cross-domain risks and dependencies without being in the weeds of every program simultaneously
• Integrate infrastructure economics with program decisions: how a GPU generation transition affects the capacity plan, how a commissioning gate failure cascades into customer commitment delays, how a firmware lifecycle choice has direct revenue implications
• Evolve the Site Operations PM to Cloud TPM engagement model as Crusoe scales from current deployment volume to significantly higher throughput
• Partner with VP and SVP-level stakeholders on programs with significant organizational risk, framing trade-offs and surfacing decision-ready analysis
• Drive the TPM organization from reactive to predictable: define leading indicators, build portfolio visibility, and coach Staff and Senior TPMs on technical depth, risk identification, and executive communication
• Set the standard for AI tool integration across the TPM team: identify where AI materially changes program tracking, risk detection, and executive communication, and drive adoption

Benefits

• Health & wellbeing: Comprehensive health benefits designed to support your overall wellness
• Time away: Paid time off for vacations, family bonding, and unexpected needs
• 401(k) match: Build your financial future with our 401(k) matching program
• Mental wellness: Resources and support for your emotional wellbeing and navigating life’s challenges- If you have spent your career running NPI programs at a hyperscaler or leading neocloud, understand GPU architecture at the generation level, and have shaped NPI frameworks rather than just operated within them, this is the role
• Networking and storage depth: cluster-leaf topology evolution, ZTP requirements, fabric commissioning, storage architecture implications (e.g., VAST integration), and how these must be updated for each new generation
• Deep software/firmware lifecycle knowledge: BIOS/BMC/GPU firmware, DOCA targets, driver stacks, GPU validation and burn-in, and why firmware versioning matters for fleet reliability at scale
• Active daily use of AI tools to drive program-level outcomes: risk detection, dependency mapping, and executive communication, not just personal productivity
• Direct hardware partner engagement: personal ownership of NVIDIA or OEM certification and validation timelines, not coordination feeding into someone else’s relationship
• Generation-level GPU architecture fluency: you understand what changes architecturally between GPU generations, including networking topology, storage implications, power and cooling requirements, and commissioning gate evolution, and can reason through second-order infrastructure effects
• 12+ years as a Technical Program Manager with a track record of owning NPI programs end-to-end at a hyperscaler, GPU cloud provider, or AI infrastructure company, ideally with direct Vera Rubin or comparable next-generation GPU program experience
• Track record of driving cross-organizational alignment at VP/SVP level without formal authority, including building durable alignment on programs that fall in the cracks between teams
• Exceptional written and verbal communication for delivering clear, data-driven, decision-oriented updates to executive stakeholders
• Proven ability to define NPI engagement models from scratch, not just operate within existing frameworks, and make them stick across engineering organizations that didn’t ask for them
• Demonstrated portfolio-level ownership: managing compounding dependencies across parallel NPI and production programs, building predictability where engineering estimates are unreliable and external dependencies are outside your control
• Direct Vera Rubin program experience from a hyperscaler with earlier hardware access than neoclouds
• Experience defining or substantially redesigning an NPI commissioning gate framework (G0–G6 or equivalent)
• Exposure to generation-level architectural transitions affecting both IaaS and Managed Services simultaneously
• Experience coaching or developing Staff-level TPMs in technical depth and program execution