Senior Verification Engineer, DDR PHY

About Iravan

Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.

Designation: Senior Verification Engineer, DDR PHY
Location: Bangalore

Experience: 6+ years

Verification ownership from testplan to vector delivery, regression debug, and quality sign-off for DDR PHY.

Must-have:

• DDR PHY architecture, DFI protocol, JEDEC standards (latest gens)
• LPDDR5/LPDDR4 hands-on experience
• Verilog/SystemVerilog, UVM/OVM
• Strong debug and root-cause skills, including SS/SoC/post-silicon issues

Good to have:

• Perl scripting
• Post-silicon bring-up, HW-SW debug
• AHB/AXI protocol knowledge

Interested? Send your profile to [email protected] .