A
Astera Labs
Senior/Staff Electronics Engineer
Skills
PythonCompliance
3 months ago
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Important information
Salary:
$160,000 – $200,000 / year
Location:
San Francisco, CA, USA
Work mode:
Onsite
Published on:
25 August 2026
What they need
Who you are
- Demonstrated strong skills in electronic circuit analysis, comprehensive testing and debug
- Bachelor degree in EE with 3+ years of experience in hardware test or design
- Expert understanding of design and test for power regulators, PDNs, Bode, clock generators
- Ability to produce test description from a schematic design, and execute and document results
- Demonstrated knowledge of the full hardware product lifecycle from Project Kick-off to RTM
- Lab equipment for hardware test - oscilloscopes, e-loads, VNA, TDR, environmental chambers, etc
- Automating lab equipment to optimize test processes, Python preferred
- Preferred Skills
- Measurements of high-speed interfaces - PCIe, DDR, 25/50G/100G SERDES, etc
- EMI/EMC compliance
- Technical writing skills - ECOs, Bug Reports, Rework WIs, MCOs, etc
- PLM, Arena or equivalent
- Understanding of the ASIC/silicon product development process
What the job involves
- As a Senior/Staff Electronics Engineer you will join the Hardware Electrical Validation team at Astera Labs, linking between the Hardware Electrical Design teams and Post-Silicon Electrical Validation teams, among others
- Note: This role is not post-silicon electrical validation; it is electrical validation of PCBAs and related hardware products
- Support the Hardware Electrical Design teams with de-risking circuits and modules from project kick-off to gerber out
- Develop comprehensive hardware electrical validation plans using correct test methods and processes
- Bring up the PCBAs upon arrival in the lab, and execute the electrical validation plans to validate all circuits on the board
- Debug complex multi-point failures in hardware - power regulators, DPMs, clock synthesizers, digital control paths, I2C, SPI, etc
- Rework components on the PCBAs to unblock debugging activities
- Pre-empt and de-risk system validation architectures - collaborate with the System Validation teams
- Support hardware activities in auxiliary teams - Post-Silicon Electrical Validation, Product Apps, System Validation, FAEs, etc
- Support the new designs using knowledge of existing products to de-risk new features and requirements
- Self-informed of new industry test standards and equipment to introduce modern testing methodologies
- Specify test equipment, develop test fixtures, help improve hardware lab functions
Benefits
- Flexible time off in the US
- Parental leave
- Competitive medical, dental and vision plans
- 401K
- Retirement and pension plans
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