Senior/Staff/Principal Engineer - Circuit

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Location: Malaysia (Penang, Selangor) and Vietnam (Da Nang, Ho Chi Minh) (on-site)

Role Overview

Join us to lead the revolution in circuit engineering. Ideal for those who are eager to grow a future together, tackling complex challenges, pioneer cutting-edge solutions for next-gen circuit.

Key Responsibilities

(1) Senior/Staff

·     Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.

·     Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.

·     Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.

·     Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress

·     Run initial SI analysis and IBIS/IBIS-AMI creations.

·     Timing closure using Prime-Time or equivalent methods.

·     Work on serial and parallel interfaces.

·     Work closely with mask designers to deliver the physical design and assist with silicon evaluation.

·     Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.

Requirements

·     Degree/Master/PHD in Electrical and Electronics.

·     Minimum 5-10 years of professional working experience in IO circuit design.

·     Proficient in circuit design using FinFet tech and EDA tools.

·     Experienced in IO circuits not limited to DDR4/5/6 , HBM3/4, LPDDR4/5X, UCIE, MIPI, LVDS

·     Worked in serial and or parallel interfaces.

·     Have understanding in transistor operations.

·     Able to work closely with Mask/Layout designers to enable physical design.

·     Skilled in teamwork and mentorship.

·     Architecture involvement for senior role

(2) Senior Staff/Principal

·     Lead and manage team that design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.

·     Manage deliveries between function groups for example Layout, RTL , DV , Physical Design and SIPI/Package.

·     Harmonize schedule and end to end delivery.

·     Work closely with business development team to understand future projects and resource needed.

·     First line of clarification and explanation for customer related questions and support.

·     Work with post silicon team for design intent and required validations.

Requirements

·     Degree/Master/PHD in Electrical and Electronics.

·     Minimum 8-15 years of professional working experience in Circuit Design and/or management.

·     Proficient in circuit design using FinFet tech and EDA tools.

·     Experienced in managing highly skilled team and dynamic timeline

·     Worked in serial and or parallel interfaces.

·     Understand layout, physical design and RTL deliveries and milestones

·     Skilled in teamwork and mentorship.

·     Exemplary planning and negotiation skills