SerDes Designer

5-7 Years

Job Type

Full Time

Location

Bangalore

Posted Date

01 Apr 2026

Job description

The Resumes with less than 5 years of relevant experience are automatically rejected

Terminus Circuits is a focused mixed-signal and high-speed interface IP development company delivering cutting‑edge SerDes and PHY solutions for datacenters, communication chips, AI, and consumer markets. We are scaling rapidly and driving multiple tapeouts in advanced FinFET nodes.

We are seeking several experienced SerDes Designers to join our team. The incumbent will participate in at least two tapeouts this year in FinFET process nodes, supporting 10+ unique IPs and several protocol-based high‑speed serial-link products. You will contribute to architecture, circuit design, verification, Tape out, silicon bring-up, and cross-functional integration.

Key Responsibilities

Design/improvise analog/mixed‑signal SerDes blocks (PLL, CDR, TX/RX front‑end, CTLE, DFE, equalizers, serializers/deserializers).

Produce circuit-level designs, schematic capture, and transistor-level Spectre simulations .

Define and document block and system-level specifications for multiple IPs and protocol products.

Perform PVT corner analysis, and robustness trade-offs for FinFET technologies.

Support layout handoff, Physical Verification and tapeout readiness reviews.

Mentor junior engineers and contribute to design reviews and technical documentation.

Required Qualifications

B.Tech/M.Tech/PhD in Electronics Communication Engineering or equivalent.

5+ years of hands‑on SerDes/high‑speed mixed‑signal design experience.

Proven experience with FinFET process nodes and multi‑Gb/s SerDes design.

Strong transistor-level design and AMS simulation skills

Familiarity with protocol-based links (PCIe, USB, MIPI, Ethernet, JESD, etc.) and compliance testing.

Proficiency in scripting for automation (Skill, PERL) and data analysis.

Strong communication and cross-functional teamwork skills.

Preferred

Experience delivering multiple IPs across tapeouts and managing project timelines.

Knowledge of PAM4, NRZ, adaptive DFE, and advanced equalization methods.

Prior leadership or mentorship experience.

How to Apply

Send your resume and a brief cover letter highlighting relevant SerDes projects and tapeout experience to email:[email protected]. Subject: “SerDes Designer — Terminus Circuits.”

Employment Type

Full-time