Silicon Validation Engineer

Role Summary
Responsible for functional, performance, and system validation of SoC IPs and platforms across multiple development stages. The role includes executing system stress tests, IP level validation, thermal and corner testing, and debugging silicon issues using hardware and OS based tools.

Key Responsibilities

• Perform functional and performance validation of SoC IPs including PCIe, USB, Ethernet, DDR, HDMI/DP, SPI/I2C/I3C, CPU cores, and Power Management.
• Execute System Validation Tests (SVT) such as reset stability and stress testing for CPU, storage, network, and display.
• Conduct validation across development stages (UU, Proto, EVT, DVT, IP).
• Perform testing across process, voltage, and temperature corners ( 40C to 105C).
• Execute validation using JTAG/HDT, UEFI, Linux, and Windows environments.
• Validate RAS features and analyze issues such as MCEs, hangs, and error/failure logs.
• Debug silicon issues and provide detailed analysis and reports.

Required Skills

• Experience in SoC / Silicon validation
• Hands on with hardware debug tools (JTAG/HDT)
• Strong debug, log analysis, and system level troubleshooting skills
• Familiarity with Linux and Windows validation environments