SoC Interconnect Architect, Designer, and Methodology Developer

We are seeking skilled engineers for designing high-performance Virtualization and Interconnect Architecture and developing RTL for both Automotive and High-Performance Computing. Roles: 1. Develop, assess, and refine RTL to achieve performance, power, area, and timing goals. 2. Develop micro-architecture by exploring early high-level macro architectures, researching micro-architecture, and defining detailed specifications. 3. Coordinate co-design efforts between architecture, software, and hardware teams to achieve functional realization. 4. Develop and implement interconnect methodologies, such as simulation, emulation, implementation, and efficiency improvement.

Main Requirements and Qualifications

• 1. MS or PhD degree in electrical engineering or equivalent experience.
• 2. At least 4+ years of IC design experience.
• 3. Good understanding of System on Chip (SOC) design and verification concepts, including the design flow from specification to tape-out.
• 4. At least 8+ years of experience in digital IC design or proficient in SystemC/C++ (preferred).
• 5. Expertise in one or more of the following: Interconnect, Virtualization, Access control, MMU, Security, IO technologies, Multimedia accelerator, Platform integration (preferred).
• 6. Proficient in scripting languages such as Perl, Python, and TCL (preferred).
• 7. Embrace challenges.