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SoC/ IP Verification Engineer

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Onsite

SoC/ IP Verification Engineer

Semicorelabs Innovation

SoC/ IP Verification Engineer

Skills

Python

2 months ago

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Important information


Contract type:

Permanent

Salary:

₹300,000 – ₹600,000 / year

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

7 September 2026

What they need


Job Title
SoC/IP Verification Engineer (Low Power, GLS/RTL, Formal)
Experience
Experience: 3-6 years in ASIC/SoC Verification or IP Verification.
Job Summary
We are looking for a skilled SoC/IP Verification Engineer with strong experience in ASIC/SoC verification methodologies. The ideal candidate should have hands-on expertise in SystemVerilog, UVM, SVA, Low Power Verification (UPF/CPF), Gate-Level Simulation (GLS), and Formal Verification. The role involves developing robust verification environments, validating complex SoC/IP designs, ensuring protocol compliance, and achieving functional and coverage closure.
Roles & Responsibilities

  • Develop and execute verification plans for complex SoC/IP designs.
  • Build and maintain SystemVerilog/UVM-based verification environments.
  • Perform Low Power Verification using UPF/CPF methodologies.
  • Execute Gate-Level Simulation (GLS) with SDF back-annotation.
  • Verify low-power netlists, including isolation, retention, level shifters, and DFT-inserted logic.
  • Perform protocol verification for DDR and PCIe interfaces.
  • Use JasperGold for formal verification, connectivity checking, and coverage closure.
  • Develop reusable verification components, including BFMs, monitors, checkers, scoreboards, and coverage models.
  • Debug RTL, GLS, and formal verification issues.
  • Collaborate with architects, RTL designers, and pre/post-silicon teams.
  • Develop automation scripts using Python or Perl to improve verification flows.

Preferred Skills

  • SoC/IP Verification
  • ASIC Verification
  • SystemVerilog (SV)
  • UVM
  • SystemVerilog Assertions (SVA)
  • Low Power Verification (UPF/CPF)
  • Gate-Level Simulation (GLS)
  • RTL Verification
  • Formal Verification (JasperGold)
  • DDR & PCIe Protocol Verification
  • Functional Coverage & Coverage-Driven Verification (CDV)
  • Python/Perl Scripting
  • Strong debugging and analytical skills
  • Excellent communication and teamwork

Educational Qualification

  • B.E./B.Tech or M.E./M.Tech in Electronics & Communication Engineering (ECE),
  • M.E./M.Tech in Electronics & Telecommunication Engineering (ETE)

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