ACL Digital
SoC Verification Lead
Skills
21 days ago
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Important information
Contract type:
Permanent
Location:
Bengaluru, Karnataka, India
Work mode:
Onsite
Published on:
6 October 2026
What they need
Lead Design Verification Engineer
Experience: 10+ Years
Location: Bangalore
Job Description:
We are looking for an experienced Design Verification Engineer with strong expertise in IP/Sub-system/SoC level verification and high-speed protocols . The candidate will be responsible for driving end-to-end verification activities, defining verification strategies, and leading complex verification closures.
Key Responsibilities:
- Define and execute verification plans and methodologies for IP and SoC level designs.
- Develop scalable UVM/SystemVerilog based verification environments from scratch.
- Lead testbench architecture, stimulus creation, scoreboards, assertions, and functional coverage .
- Drive verification closure including coverage analysis, regressions, and sign-off metrics.
- Work closely with design, architecture, and firmware teams for feature validation and debug.
- Handle complex debug at RTL, gate level, and emulation/prototyping platforms .
- Mentor junior engineers and contribute to methodology improvements .
Required Technical Skills:
- Strong hands-on experience in SystemVerilog, UVM, and SVA .
- Expertise in IP and SoC level verification .
- Experience with one or more high-speed protocols , such as:
- PCIe / CXL
- AMBA (AXI, AHB, APB, ACE/CHI)
- Ethernet
- USB
- DDR/LPDDR
- Experience with VIP integration and customization .
- Proficiency in debug using industry-standard simulators (VCS / Xcelium / Questa).
- Strong understanding of coverage-driven verification and constrained random methodology .
- Experience in low-power verification (UPF/CPF) is a plus.
- Exposure to emulation or FPGA prototyping is an added advantage.
Soft Skills:
- Proven ability to lead verification efforts for complex projects.
- Strong problem-solving and debugging skills.
- Excellent communication and cross-functional collaboration.
Education:
- BE / B.Tech / MS in Electronics / Electrical / VLSI / related field.
Nice to Have:
- Experience in multi-core SoC / cache coherency verification
- Scripting knowledge in Python/Perl/Shell/TCL
- Formal verification exposure
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