Sr. Design Engineer / Assistant Manager - Radar Signal Processing (JD#RSP01)

LNT/-DE-AM-RSP/1781649

• DEIC-L&T Precision Engineering & Systems IC

• L&T Innovation Campus, Powai

• Posted On 15 Oct 2026

• End Date 13 Apr 2027

• Required Experience3 - 4 years

Skills

Knowledge & Posting Location

Digital Signal Processing Embedded Firmware VHDL Embedded C MATLAB FPGA design - Xilinx Flow

Minimum Qualification

Bachelor of Technology (BTech)Master of Technology (MTech)

Job Description

Job Profile

Required to work on development and implementation of signal processing algorithms, firmware development for various interfaces in Radar. Should have hands-on experience in handling the Embedded Hardware and Firmware designs.

Responsibilities:

• Algorithm development, simulation & implementation using Vivado / Matlab / Python.
• Radar Subsystem integration & testing.
• Embedded Hardware & Firmware development using FPGA / DSP / Microcontroller.
• High-speed ADC, DAC, DDR, 1G/10G Ethernet and other peripheral interface designs with FPGA.
• Hands-on experience on FPGA design tools (Vivado, Vitis HLS, System Generator) and PCB/Schematic design tools (Cadence, Allegro PCB Editor).
• Knowledge of various communication protocols (Ethernet, Serial, CAN, VME, VPX etc.)

Experience & Skills:

• 3+ years of experience in firmware design / FPGA / DSP, with a focus on Radar applications
• Programming languages: VHDL / Verilog, C/C++ Programming
• Radar Signal Processing, Matlab, Hands-on experience on Vivado FPGA tools.
• Experience on RF-ADC/DAC, RFSoC interfaces, Python are desirable.