Sr. Emulation Engineer

Scaledge India Pvt. Ltd. Formally known as Perfect VIP is hiring Sr. Silicon Validation/Emulation Engineer !

Experience:- 4+ years

Location:-BLR/Pune/HYD/Bhubaneswar

Salary:- Negotiable.

Please go through the Job Description mentioned below:-

About Scaledge:

Scaledge is one of the fastest growing product engineering services companies focused on Semiconductor Chip - Design & Verification, Processors, System design and related Embedded Software development for domains like Storage, RISC-V, AI/ML, Automotive, Consumer, Networking and IoT. We are headquartered in Silicon Valley, USA with multiple design centers across India, UK and Canada.

Scaledge has a strong history of technology, methodology & domain expertise in IP/ASIC/SOC verification in Storage, Networking, Mobile & Consumer industry

Job Summary:

We are looking for a Emulation Engineer with 4+ years of experience in emulation, verification, and validation of complex SoC designs. You will work on integrating, testing, and debugging hardware and software using Zebu platforms.

Responsibilities:

Emulate complex SoC designs using Zebu, Palladium, Velloce platforms.

Create and execute emulation test plans, testbenches, and debug issues.

Integrate RTL designs and validate functionality in the emulation environment.

Work with design and verification teams to resolve hardware/software integration issues.

Optimize emulation models for performance and debug efficiency.

Automate emulation flows with scripting (Python, Perl, TCL).

Analyze emulation results and provide feedback.

Support pre-silicon and post-silicon validation.

Requirements:

Bachelor’s/Master’s in Electrical or Computer Engineering.

4+ years in emulation, prototyping, and Zebu, Palladium, Velloce platforms.

Strong skills in RTL design (Verilog/VHDL) and SoC verification.

Experience with emulation tools, testbenches, and debugging.

Proficiency in scripting languages (Python, Perl, TCL).

Familiar with simulation tools (Synopsys VCS, Cadence Xcelium) and waveform analysis.

Knowledge of high-speed protocols (PCIe, Ethernet, DDR, USB) is a plus.

Strong problem-solving and communication skills.

Preferred:

Experience in FPGA prototyping and co-verification.

Knowledge of C/C++ programming and low-power design techniques.

Working Model

• Hybrid work model which allows employees to Work from home and Office.

Please share your updated resume to [email protected]

Thanks,

Erum.