Sr. Engineer, Photonics Device Design

Sr. Engineer, Photonics Device Design

Location: San Jose (on-site)

Ayar Labs is transforming AI infrastructure with the industry's first proven co-packaged optics (CPO) solution, manufactured in partnership with the world's leading semiconductor ecosystem. Backed by industry leaders including NVIDIA, AMD, MediaTek and Intel, our technology moves data at the speed of light — faster, further, and with a fraction of the energy consumed by conventional electrical interconnect.

As a photonics design engineer at Ayar Labs, you'll work on the devices at the heart of our CPO solution — designing, simulating, and characterizing integrated photonic components for an aggressive optical I/O product roadmap. You'll contribute to real tape-outs, develop compact models from measurement data, and build tools and infrastructure the team depends on. Because our team is small and the problems are real, you'll develop faster here than almost anywhere else: your contributions land in product, not in a backlog.

Essential Functions

• Design. Design integrated photonic components needed for an aggressive optical I/O product roadmap — passive devices (couplers, gratings, micro-ring resonators) and the system context that sets their requirements.
• Characterize and iterate. Plan test vehicles, use measurement data to refine simulation models, and drive device performance toward roadmap targets.
• Build infrastructure. Contribute to the team's design and analysis codebase — extend simulation automation, layout scripts, and data analysis tools that make the whole team faster.
• Collaborate. Work with colleagues across packaging, laser, circuits, and firmware to understand system requirements and translate them into device specifications.
• Support manufacturability. Work with foundry process data to assess design margins, contribute to design-for-manufacturability, and support yield improvement on new device designs.

Required Qualifications

• B.S. or equivalent experience in Electrical Engineering, Optical Engineering, Physics, or related field; M.S. or PhD a plus
• 2+ years of experience in silicon photonics or integrated photonic device design (research or commercial)
• Solid understanding of photonic device physics: waveguides, couplers, gratings, micro-ring resonators
• Experience with simulation tools for passive optical devices (e.g., FDTD, mode solvers)
• Python skills; experience writing structured code in a team environment
• Ability to connect simulation to measurement — design, characterize, and iterate on device performance

Preferred Qualifications

• M.S. or PhD with integrated photonics focus
• Experience contributing to PIC tape-outs on a standard silicon photonics platform (e.g., AIM Photonics, GlobalFoundries, imec, or similar)
• Experience designing or characterizing electro-optic devices: micro-ring modulators, photodetectors
• High-speed test experience: BERT, VNA, wafer-level characterization
• Statistical analysis of device or process data; DOE methods
• Familiarity with optical transceiver principles and co-packaged optics architectures
• Demonstrated use of AI tools to achieve meaningful productivity gains in design or analysis workflows — e.g., device optimization, AI-assisted code development

Salary range: $170,000-$220,000

NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers.

Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.