Sr. Process Engineer, Wet Etch (Terafab)

What to Expect

We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot.

Process engineering is where the discipline by which Terafab technology gets built, atom by atom, and dielectric films set the foundation for device performance. You will develop and own dielectric deposition processes across three distinct chip families: edge-inference processors, space-hardened data center AI chips for orbital satellites, and high-bandwidth memory. You'll optimize mechanical, chemical, optical, and electrical properties of dielectric thin films including but not limited to film stress, conformality, gapfill, dielectric constant, and leakage current while balancing thermal budgets and integration constraints across radically different product requirements.

You should have deep expertise in dielectric deposition but be ready to work across core process domains such as etch, clean, CMP, metallization, photo, metrology, and thermal processing and integration engineers as integration evolves. This is a highly hands-on role at one of the most ambitious fab programs in the world.

What You’ll Do

• Develop and qualify ALD, CVD, and PECVD processes for thin film dielectrics: gate dielectrics, high-k materials, spacer films and annealing for Core Tr/Cap dielectrics shallow trench isolation, dielectric barrier, inter-layer dielectrics (ILD), dielectric barrier, inter-metallic dielectrics (IMD) and passivation for Isolation and passivation anti-reflective dielectric, blanket hardmask, ALD hardmask, high selective metal-containing hardmask, dry PR for Patterning enabling films

• Characterize dielectric film properties—thickness, k-value, leakage, breakdown voltage, conformality, void-free gapfill, modulus/hardness, and stress

• Own development for thin films from tool installation and its continuous improvement through HVM handoff for optimal productivity and yield

• Qualify deposition tools from installation through production readiness, including chamber matching, particle control, and process window and stability qualification

• Analyze process, property and structure from first-principles, physics-based approach to understand cause and effect mechanisms and to optimize key properties, not just recipes

• Lead root cause analysis, establish inline metrology and control strategies, and drive systematic yield improvement

• Support 24/7 manufacturing operations through rotations, on-call availability, and rapid response to critical production issues

• Drive next-generation dielectric materials and process development What You’ll Bring

• Degree in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or related technical field, or equivalent experience

• 5+ years of hands-on thin films process/integration engineering experience in a semiconductor fab, especially advanced logic, memory, or foundry environment

• Deep experience with ALD/CVD tool qualification, dielectric process development, and process of record establishment at advanced nodes

• Proficiency with thin films metrology tools, characterization, film stress measurement, and defect inspection

• Strong Design of Experiments skills and statistical analysis capability

• Ability to work closely and proactively across lithography, etch, thin films, integration, and equipment engineering teams